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Timing over Packet

ITU-T G.823/824 Compliance in Packet Networks using Adaptive Clock Recovery

Introduction

Packet-switched networks offer great cost savings in cellular backhaul and enable flexibility and scalability for new bandwidth-intensive applications such as mobile broadband and HSDPA data services. Nevertheless, as PSNs are asynchronous and non-deterministic by nature, they also introduce inaccuracies such as packet delay variation and packet loss, which are intolerable in real-time 2G voice and 3G video services. Since packet transport’s many advantages would not compensate for service disruptions, impaired cell hand-offs and excessive dropped calls, a method for robust and accurate synchronization needs to be maintained and distributed to all network elements.

 

Ensuring that all network clocks are synchronous, i.e. operating at the same average frequency, is crucial, as even the smallest mismatch in source and receiver clock rates leads to bit slips: a miniscule one part per million (ppm) delay in the receiver clock, translates to one bit loss for every 1,000,000 bits sent, which leads to an unacceptable rate of two bit errors per second for a 2 Mbps E1 signal. Consequently, both the source and destination clocks’ long-term average frequencies need to be kept identical, with short-term deviations from the average properly restricted.

 

As cellular operators and transport providers migrate to an all-IP backhaul, industry standards specifying requirements for delivering precise timing to TDM-based services are being implemented for mobile applications over PSN. Quantifying minimum synchronization requirements for network equipment and maximum allowable values for network impairments, these standards normally focus on two widely-accepted frequency/phase error characterization methods: The Maximum Time Interval Error (MTIE) and the Time Deviation (TDEV).

 

This document provides a set of generic requirements for high-performance clock distribution in Packet Switched Networks (PSN), using the Adaptive Clock Recovery (ACR) technique. These requirements refer to the two most popular timing criteria: the ITU-T G.823/824 traffic and synchronization (PDH) interface MTIE masks.

 

The paper is divided to two sections: The first discusses the issue of Packet Delay Variation (PDV) introduced by PSNs and derives a generic set of guidelines that allow a ‘controlled’ ACR performance over such networks. The second section focuses on packet-loss and packet mis-order. Using intuitive explanations and actual test results, it demonstrates that these phenomena do not, in effect, cause any substantial degradation in clock recovery performance levels.

 

For the complete White Paper, download the PDF.

 
Related Links

This is an introduction to the White Paper written by By Alon Geva, Team Leader, DSP Timing Solutions RAD Data Communications Ltd. For the complete White Paper, download the PDF.

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